专利摘要:
The present invention relates to an orthogonal frequency division multiplexed transmission / reception system and a block encoding method for achieving the same. In the orthogonal frequency division multiplexed transmission system, binary data of length U is n-bit pairs of binary data by a predetermined mapping rule. A block encoder for coding with; A serial / parallel converter for converting the encoded data into parallel data; A binary modulator for modulating the binary data input in parallel to generate one orthogonal frequency division multiplexing (OFDM) symbol consisting of U subsymbols; And a transmitter for post-processing and transmitting the OFDM symbol to be suitable for wireless transmission. According to the present invention, the block data and the quadrature modulation of the binary data to reduce the ratio of the peak power to the average power of the signal during the OFDM signal transmission, it is possible to transmit at a higher data rate than the conventional binary data block coding.
公开号:KR20000061445A
申请号:KR1019990010494
申请日:1999-03-26
公开日:2000-10-16
发明作者:김진숙
申请人:윤종용;삼성전자 주식회사;
IPC主号:
专利说明:

Orthogonal Frequency Division Multiplexed Transmission / Reception System and Block Encoding Method therefor {OFDM transmission / receiving system and block encoding method therefor}
The present invention relates to an orthogonal frequency division multiplexed transmission / reception system and a block encoding method for achieving the same.
Orthogonal Frequency Division Multiplexing (hereinafter, referred to as OFDM) is a multi-carrier modulation scheme that is resistant to multipath fading and intersymbol interference, and has a signal-to-noise ratio. SNR) is low, and there is an advantage in that it can be reliably transmitted at a high data rate even in a channel with a high temporal dispersion. In particular, this technology is suitable for the field of mobile wireless communications, and has been applied to wireless LAN, digital audio or video broadcasting.
However, the biggest disadvantage of the OFDM scheme is that it has a high peak-to-average power ratio (hereinafter referred to as PAR) in OFDM signal transmission. When data is transmitted using N subcarriers, when N signals have the same phase and are summed, a peak power that is N times the average power is generated. Larger peak powers than average powers become nonlinear components, which cause intermodulation between subcarriers, resulting in poor SNR at the receiving end and unwanted out-of-band radiation. do. If a power amplifier or mixer does not operate with a large back-off, it may be difficult to maintain out-of-band power limited by Telecommunications Authorities. This is not possible and causes the SNR to drop at the receiving end. Therefore, the power amplifier must operate with very large backoff to prevent spectral regrowth of the OFDM signal due to intermodulation between the subcarriers and unwanted out-of-band radiation. This means that the amplifier is operated inefficiently, which in turn causes the price of the transmitter to rise.
In order to solve this problem, a method of reducing PAR includes using a fast Fourier transform (hereinafter referred to as FFT), changing a phase, or using a block code. The method using FFT is to find a value for reducing PAR by repeating FFT and IFFT (Inverse FFT) by adding a block having a value only to an arbitrary subcarrier in front of the FFT. The method using FFT is not suitable for a wireless communication system because it is complicated to implement in real time and there is a time delay because it has to repeat the same thing every time according to transmission data in order to find a value for reducing PAR.
The phase changing method is a method of properly converting phases of N signals to be transmitted so that N signals do not have the same phase with each other. Such a phase shifting method is also referred to as a complementary code, and there are Golay codes and Reed-Muller codes. The compensation code uses a phase shifter represented by an exponential function to convert the N signals into phase codes set that do not have the same phase according to any transmission data. However, there is a problem that the phase shifter is complicated to implement in actual hardware.
The block code method encodes using a codebook, so that the size of the encoder and the decoder is large. In addition, this method considers only the block code for binary modulation data, and thus has a disadvantage of low data rate.
The present invention provides an OFDM transmission system for encoding, modulating and transmitting binary data of a predetermined length into quadratic data represented by a 2-bit pair, an OFDM reception system for demodulating and decoding a received OFDM signal, and the 2 The present invention provides a block encoding method for encoding binary data into binary data.
1A and 1B are block diagrams of an orthogonal frequency division multiplexing transmission / reception system according to the present invention, respectively.
FIG. 2A is a flowchart of a method of designing the block encoder and decoder illustrated in FIGS. 1A and 1B.
2B is a block diagram of an apparatus for block encoder configuration.
FIG. 3 shows an example of the codebook formed by performing shown in FIG. 2A.
4 shows an example of division of a codebook used in the present invention.
In order to achieve the above technical problem, the present invention provides a block encoder for encoding binary data of length U into n-bit pairs of binary data by a predetermined mapping rule; A serial / parallel converter for converting the binary data into parallel data; A binary modulator for modulating the binary data input in parallel to generate one orthogonal frequency division multiplexing (OFDM) symbol consisting of U subsymbols; And a transmitter for post-processing and transmitting the OFDM symbol to be suitable for wireless transmission.
In order to achieve the above technical problem, the present invention provides a pre-processing unit suitable for demodulating an orthogonal frequency division multiplexing (OFDM) signal transmitted by U carriers; A binary demodulator for generating an n-bit pair of binary data by demodulating the preprocessed OFDM signal; A parallel / serial converter for converting the binary data into serial data; And a block decoder for decoding the serial V binary data into binary data having U lengths according to a predetermined mapping rule.
In order to achieve the above technical problem, the present invention provides a first step of generating a binary data of any n-bit pair; Generating an orthogonal frequency division multiplexing (OFDM) symbol by modulating and inverse fast Fourier transforming the binary data; Classifying the OFDM symbol as a codeword candidate if the OFDM symbol satisfies a predetermined condition; Extracting the number of binary data inputted in the order of the smallest bit change among the classified candidates; And forming a codebook by associating the extracted codewords with each inputtable case of the binary data.
Hereinafter, exemplary embodiments of the present invention will be described in detail with reference to the accompanying drawings. 1A is a block diagram of an orthogonal frequency division multiplexing transmission system according to the present invention. The transmission system according to FIG. 1A includes a block encoder 100, a serial to parallel converter (SPC 101), a Q-ary modulator 102, and an inverse fast Fourier converter (Inverse Fast). Fourier Transformer, 103, hereinafter referred to as IFFT), cyclic prefix adder 104, digital to analog converter (DAC) 105, and low pass filter (LPF) 106.
FIG. 1B is a block diagram of a receiving system for receiving a signal transmitted in the transmitting system of FIG. 1A. The receiving system according to FIG. 1B includes LPF 110, analog / digital converter (ADC) 111, cyclic prefix remover 112, FFT 113, quaternary demodulator 114, parallel / .serial converter (PSC, 115 and block decoder 116.
The operation of the system shown in FIGS. 1A and 1B is as follows. The block encoder 100 blocks-code binary data of a predetermined length at a predetermined code rate. For example, in a transmission system with 8 subcarriers, 8 bits of binary data A 0 , A 1 ,. , A 7 is block coded at code rate 1/2, and 16-bit binary data C 0 , C 1 ,. Is converted to C 15 . The conversion follows a predetermined mapping rule. The SPC 101 converts the data converted by the block encoder 100 into parallel data.
The quaternary modulators 102 are each composed of C 0 , C 1 ,... , Modulate C 15 to form eight subsymbols. The quadrature modulator 102 is a quadrature amplitude modulator or quadrature phase shift keying. In the present invention, for simplification, the quaternary modulator is taken as an example, but may be extended to the V-modulator according to the encoding result of the block encoder 100.
IFFT 103 forms an OFDM symbol by 8-IFFT the data modulated by ternary modulator 102. The cyclic prefix adder 104 adds a cyclic prefix to the OFDM symbol. The length of the added cyclic prefix is about 10% of the length of one OFDM symbol. The signal converted to analog at DAC 105 is low pass filtered at LPF 106 and wirelessly transmitted.
The LPF 106 of the receiving system filters the transmitted frequency signal with the same frequency domain as the LPF 106 of the transmitting system. ADC 111 converts the filtered signal into a digital signal, and cyclic prefix remover 112 removes the cyclic prefix added in the transmission system. The FFT 113, the quaternary demodulator 114, the PSC 115, and the block decoder 116 each perform an inverse process of the process performed by the corresponding component of the transmission system, thereby restoring the OFDM signal.
The above-described process is a case of a system for transmitting and receiving using eight subcarriers. In case of transmitting using 16 subcarriers, an interleaver (not shown) is further provided between the block encoder 100 and the SPC 101 in the transmission system. For example, 16-bit binary data A 0 ,.. , A 7 , A 8 ,. When A 15 is sequentially input, the block encoder 100 blocks the code at a code rate of 1/2, so that C 0 C 1 ... , C 14 C 15 and C 16 C 17 ,. Outputs C 30 C 31 . The interleaver is C 0 C 1 . , C 14 C 15 C 16 C 17 ,. , C 30 C 31 to C 0 C 1 C 16 C 17 C 2 C 3 C 18 C 19 . Interleave with C 14 C 15 C 30 C 31 . At this time, the output of the quaternary modulator 102 is one OFDM symbol composed of 16 subsymbols.
In the receiving system, a deinterleaver (not shown) is provided between the PSC 115 and the block decoder 116, and the deinterleaver includes C 0 C 1 C 16 C 17 C 2 C 3 C 18 C 19 . C 14 C 15 C 30 C 31 to C 0 C 1 . , C 14 C 15 C 16 C 17 ,. , Deinterleave to C 30 C 31 .
FIG. 2A is a flowchart of a method of designing the block encoder and decoder illustrated in FIGS. 1A and 1B. 2B is a block diagram of an apparatus for block encoder configuration.
A block encoder and decoder design method according to the present invention will be described in more detail with reference to FIGS. 2A and 2B.
Once the desired number of subsymbols U and the modulation scheme V-ary of the data to be transmitted to one subsymbol are determined, the binary data generator 240 generates the binary data having the length U (step 200). The OFDM symbol generator 242 generates a OFDM symbol by performing a binary modulation on the data generated by the binary data generator 240 and performing IFFT (step 201). If the generated OFDM symbol satisfies a predetermined condition, for example, a condition in which the PAR of the OFDM symbol is less than or equal to a desired value PAR de (step 204), the determination unit 244 classifies it as a codeword candidate ( Step 206).
For example, in the case of modulating and transmitting ternary data having eight subsymbols, 640 data satisfying a condition of PAR u = 8 ≤1.03 dB among the total number of ternary data 4 8 = 65536 are codewords. Are classified as candidates. In the case of ternary data having 16 subsymbols, PAR de 6dB is preferable as a condition for discriminating a codeword candidate.
PAR can be calculated as follows.
Here, X (t) is one OFDM symbol and T is a symbol duration of one OFDM symbol.
The codeword extractor 246 selects codewords that can reduce the size of the encoder and decoder among the classified codeword candidates, that is, codewords that can reduce the number of gates constituting the encoder and the decoder because there is little bit change between data. In operation 208, the total number of input binary data is selected as the final codeword. For example, when binary data of length 8 (8 bits) is input, 2 8 = 256 pieces are extracted as codewords. The codebook storage unit 248 stores codebooks that associate these codewords with binary data (step 210). 3 illustrates an example of a codebook formed by performing the above steps, and illustrates an input / output relationship between an encoder and a decoder. Each number is represented in hexadecimal, MS indicates the top four bits of the encoder, A 0 A 1 A 2 A 3 , and LS indicates the input four bits of the encoder, A 4 A 5 A 6 A 7 . The rest are output data 16 bits C 0 C 1 ... Represents the hexadecimal representation of C 14 C 15 .
The codebook storage unit 248 may be regarded as a block encoder. That is, the input binary data may be an address, and a codeword stored at a location indicated by the address may be read and output. In order to perform this faster, a predetermined mapping rule may be derived from the codebook, and a block encoder may be configured in hardware to satisfy the derived mapping rule. To this end, the mapping rule generator 250 divides the codebook into predetermined regions (step 212). 4 shows an example of division of a codebook used in the present invention. As shown, the codebook is divided into G, H, J, K, L, M, N, P, Q, and R. For example, 64 codewords satisfying the G region are provided. The divided region is simply made according to a known Karbaugh map to form a Boolean logic equation as follows.
Likewise, H, J, K, L, M, N, P, Q, and R can also be represented by Boolean equations.
A 0 ,... Based on Equations 2 and 3; , C 0 for A 7 . The mapping rule to C 15 may be represented by a Boolean equation as in the following equation (step 214).
The hardware 252 is a block encoder and is composed of a plurality of logical sum (OR) gates, logical product (AND) gates, and NOT gates so as to satisfy the above-described logic equation, and corresponding to the input binary data. The word is output (step 216).
Next, C 0 ,... In order to configure the hardware of the block decoder from the above equations. , G for C 15 . The value of R can be obtained as the following Boolean equation.
C 0 ,... , A 0 for C 15 ,. The decoding mapping rule to, A 7 can be obtained as follows.
According to the mapping rule for decoding the block, a block decoder is configured with a plurality of logical sum (OR) gates, logical product (AND) gates, and NOT gates (step 216).
Based on the codebook as shown in Fig. 3, A 0 ,. , 8 bits of data of A 7 and C 0 ,... In the mapping rule between 16 bit codes of C 15 , there may be various other rules for reducing the logical equations of the decoder and the PAR reduction encoder having a code rate of 1/2. That is, there may be a method of obtaining a mapping logic equation different from the input / output mapping of the present invention or optimizing when implementing a logic gate circuit based on the logic equation given in the present invention.
According to the present invention, the block data and the quadrature modulation of the binary data to reduce the ratio of the peak power to the average power of the signal during the OFDM signal transmission, it is possible to transmit at a higher data rate than the conventional binary data block coding.
In encoding and decoding, not only can a desired output value be found using a codebook, but also an encoder and a decoder can be implemented using only a logical product, a logical sum, and a negative gate by an input-output relational expression according to the codebook. Therefore, the hardware configuration is simple, it can be implemented in a smaller size, and the response delay of the system is small, high speed data transmission is possible.
权利要求:
Claims (11)
[1" claim-type="Currently amended] A block encoder for encoding binary data having a length of U into n-bit pairs of binary data by a predetermined mapping rule;
A serial / parallel converter for converting the binary data into parallel data;
A binary modulator for modulating the binary data input in parallel to generate one orthogonal frequency division multiplexing (OFDM) symbol consisting of U subsymbols; And
Orthogonal frequency division multiplexing transmission system comprising a transmitter for post-processing and transmitting the OFDM symbol suitable for wireless transmission.
[2" claim-type="Currently amended] The method of claim 1, wherein the block encoder
And a codebook storage unit for storing the binary data to be output in correspondence with the binary data inputted to output the n-bit pair of binary data which is a result of encoding the input binary data.
[3" claim-type="Currently amended] The block encoder of claim 2, wherein the block encoder is located at the front end of the codebook storage unit.
A binary data generator for generating arbitrary n-bit pairs of binary data;
An OFDM symbol generator configured to perform V-modulation on the generated binary data and inverse fast Fourier transform to generate an OFDM symbol;
A discriminating unit for discriminating a codeword candidate when the OFDM symbol satisfies a predetermined condition; And
And a codeword extracting unit for extracting 2 U codewords having a small bit change among the codeword candidates from the codeword candidates.
And storing the extracted codeword as the binary data at a corresponding position of the codebook storage unit in which the binary data is an address.
[4" claim-type="Currently amended] The method of claim 3, wherein the determining unit
Orthogonal frequency division multiplexing transmission system for determining whether the ratio of peak power to average power of the OFDM symbol is less than or equal to a predetermined value.
[5" claim-type="Currently amended] The method of claim 1, wherein the block encoder
The codebook for storing the binary data to be output in correspondence with the inputtable binary data is divided into predetermined regions, and the divided regions are represented by logical equations of the respective bits of the binary data according to the Carnot map. A plurality of logical products (AND) and logical sums configured to satisfy the second logical equation when each bit of the binary data is represented by a second logical equation by the logical equation and the bits of the binary data. Or) and NOT gates.
[6" claim-type="Currently amended] A preprocessing unit suitable for demodulating an orthogonal frequency division multiplexing (OFDM) signal transmitted by U carriers;
A binary demodulator for generating an n-bit pair of binary data by demodulating the preprocessed OFDM signal;
A parallel / serial converter for converting the binary data into serial data; And
And a block decoder which decodes the serial V binary data into binary data having U lengths according to a predetermined mapping rule.
[7" claim-type="Currently amended] The method of claim 6, wherein the block decoder is
Orthogonal frequency division multiplexing receiving system characterized in that it is a codebook storage unit for storing the binary data to be output corresponding to each of the binary data to be transmitted to output binary data of the length U corresponding to the transmitted binary data .
[8" claim-type="Currently amended] The method of claim 6, wherein the block decoder is
A codebook for storing binary data to be output corresponding to the binary data to be transmitted is divided into predetermined regions, and the divided regions are represented by logical equations of respective bits of the binary data according to a Carno map. A plurality of logical products (AND) configured to satisfy the second logical equation, when each bit of the binary data is represented by a second logical equation by the bits of the logical equation and the binary data Orthogonal frequency division multiplexing receiving system characterized by having (OR) and NOT gates.
[9" claim-type="Currently amended] Generating a binary data of any n-bit pair;
Generating an orthogonal frequency division multiplexing (OFDM) symbol by modulating and inverse fast Fourier transforming the binary data;
Classifying the OFDM symbol as a codeword candidate if the OFDM symbol satisfies a predetermined condition;
Extracting the number of binary data inputted in the order of the smallest bit change among the classified candidates; And
And forming a codebook by associating the extracted codewords with each inputtable case of the binary data.
[10" claim-type="Currently amended] The method of claim 9, wherein the condition for classifying the OFDM symbol as the codeword candidate is:
And determining whether a ratio of peak power to average power of the OFDM symbol is less than or equal to a predetermined value.
[11" claim-type="Currently amended] The method of claim 9,
Dividing the codebook into predetermined regions;
Expressing the divided region as first logical equations by respective bits of the binary data;
Expressing each bit of the codeword with second logical equations by the divided region and respective bits of the binary data; And
Configuring a block encoder that satisfies the first and second logical equations with a plurality of logical sum gates, logical product gates and negated gates to output the codeword when the binary data is input; Block encoding method for orthogonal frequency division multiplexing transmission, characterized in that.
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同族专利:
公开号 | 公开日
JP2000295192A|2000-10-20|
KR100480765B1|2005-04-06|
CN1174573C|2004-11-03|
EP1039714B1|2007-09-05|
US6810007B1|2004-10-26|
EP1039714A2|2000-09-27|
DE60036245T2|2008-06-05|
DE60036245D1|2007-10-18|
CN1273466A|2000-11-15|
EP1039714A3|2002-03-27|
引用文献:
公开号 | 申请日 | 公开日 | 申请人 | 专利标题
法律状态:
1999-03-26|Application filed by 윤종용, 삼성전자 주식회사
1999-03-26|Priority to KR19990010494A
2000-10-16|Publication of KR20000061445A
2005-04-06|Application granted
2005-04-06|Publication of KR100480765B1
优先权:
申请号 | 申请日 | 专利标题
KR19990010494A|KR100480765B1|1999-03-26|1999-03-26|OFDM transmission/receiving system and block encoding method therefor|
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